LAYOUT / SCHEMATIC

  Accel Technologies (Layout):

• Up to 99 layers: multiple and split power and ground planes


• User-definable board, net, and components attribute


• User-definable pad stacks, including blind/buried vias


• Advanced bi-directional ECO Capabilities


• Tight integration to SPECTRA autorouter by CADENCE

  Cadence Design Systems (Router):

• Recognizes and routes through staggered pins


• Easily handles off-grid and non-standard dimension items


• Define critical routes that should not be adjusted by the autorouter.


• Multi-pass autorouter that uses crossovers and conflicts to achieve 100% completion of first pass


• Via fanout control settings for inside body, outside body, all pins, signals only, power pins, or active pins


• Removes unnecessary vias and trace corners


• Run several route sessions in sequence, specifying design files, associated command files and 7 special switches

SCHEMATIC

  Accel Technologies:

• Powerful Placement and Editing including step and repeat copy, object resize, multi-line unwind, rewire, drag and drop move, align intelligent wires and buses



• User-definable component, net and sheet attributes



• ERC violation highlighted on screen



• Hierarchy support



• Full, bi-directional ECO's